Field
The disclosure relates to a method of manufacturing a semiconductor device, and a semiconductor device.
Related Art
A semiconductor device having a trench-type insulated structure has been known conventionally (as described in, for example, JP H06-224437A). In the methods disclosed in JP H06-224437A and JP 2001-267570A, a p-type semiconductor region is provided in the vicinity of the outer periphery of a bottom face of a trench by ion implantation, with a view to suppressing reduction of the breakdown voltage of the semiconductor device due to the potential crowding in the vicinity of the outer periphery of the bottom face of the trench.
For example, in a gallium nitride (GaN)-based semiconductor, however, there may be a difficulty in forming the p-type semiconductor region by ion implantation. There is accordingly a need for a technique that suppresses reduction of the breakdown voltage of the semiconductor device.